The present invention relates to a display device, and in particular to an active matrix type display device having a driver circuit for driving pixels, fabricated on its substrate of its display panel.
A display panel has an electrooptical material layer sandwiched between a pair of substrates. In this specification, the term xe2x80x9celectrooptical materialxe2x80x9d refers to material which changes its optical properties such as transmission, emission, refractive index and absorption of light under the influence of an electric field or current. The electrooptical material includes liquid crystal material and electroluminescent material, for example.
By way of example, an active matrix type liquid crystal display device shall be considered.
In the active matrix type liquid crystal display device, each pixel area is surrounded by two adjacent ones of a plurality of gate signal lines extending in the x direction and arranged in the y direction and two adjacent ones of a plurality of drain signal lines extending in the y direction and arranged in the x direction which are fabricated on a liquid-crystal-layer-side surface of one of a pair of substrates sandwiching a liquid crystal layer. Each pixel area is provided with a thin film transistor operated by a scanning signal supplied from one of the gate signal lines and a pixel electrode supplied with a video signal from one of the drain signal lines via the thin film transistor.
The pixel electrode generates an electric field between it and a counter electrode fabricated on the other of the pair of substrates, for example, so that the electric field control the light transmission through the liquid crystal layer between the two electrodes. The liquid crystal display device is provided with a scanning signal driving circuit for supplying a scanning signal to each of the gate signal lines and a video signal line driving circuit for supplying a video signal to each of the drain signal lines.
These scanning signal driving circuit and video signal line driving circuit are formed of a large number of MIS (Metal Insulator Semiconductor) transistors having configurations similar to thin film transistors fabricated in the pixel areas, and therefore a technique is known in which semiconductor layers of the thin film transistors in the pixel areas are made of polycrystalline silicon (p-Si), and the scanning signal driving circuit and the video signal line driving circuit are fabricated on the one of the pair of substrates simultaneously with the pixels. These circuits are composed of transistors made of polycrystalline silicon, therefore their output signal levels are low, and consequently, their output signal themselves are sometimes insufficient for driving the pixels. To solve this problem, voltage level converters are incorporated into the liquid crystal display devices for converting voltages such as pulses from a low level to a higher level. Generally, the voltage level converters as shown in FIG. 16 or FIG. 17, for example.
The basic operating principle of the above-mentioned voltage level converters is that ON-OFF of a current in one of a pair of MOS transistors of the opposite conductivity types is controlled by an external input pulse, and by using a resultant change in voltage, ON-OFF of a current in the other of the pair of MOS transistors is controlled so as to provide a pulse having an amplitude greater than that of the external input pulse. As a result, ON-OFF of the current in the other of the pair of MOS transistors is controlled by using as an input a large voltage change close to an amplitude of the level-converted voltage. Consequently, some current (hereinafter the through current) flows through the pair of MOS transistors before the voltage for controlling ON-OFF of the current in the other of the pair of MOS transistors reaches a voltage sufficient to control the ON-Off of the current.
When the voltage level converter is composed of polysilicon MOS transistors, it has been pointed out that its current supply capability is decreased further when it is gate-controlled with an external small-voltage input pulse because charge-carrier mobility in the polysilicon MOS transistors is smaller than that in single-crystal MOS transistors, therefore a time is increased which is required for a voltage to reach a value sufficient to control ON-OFF of a current of the MOS transistor, and as a result the above-explained through current is increased.
The present invention has been made so as to solve the above problems, and it is an object of the present invention to provide a display device having a voltage level converter with the above-explained through current sufficiently suppressed.
The following explains the representative ones of the present inventions briefly.
In accordance with an embodiment of the present invention, there is provided a display device including a pair of substrates, an electrooptical material layer sandwiched between the pair of substrates, a plurality of pixels formed between the pair of substrates and a driver circuit for driving the plurality of pixels provided on one of the pair of substrates, the driver circuit including a level converter circuit comprised of MISTFTs (Metal Insulator Semiconductor Thin Film Transistors) having semiconductor layers made of polysilicon, the level converter circuit comprising: a pair of a first NMISTFT (N-channel type Metal Insulator Semiconductor Thin Film Transistor) and a first PMISTFT (P-channel type Metal Insulator Semiconductor Thin Film Transistor), each of the first NMISTFT and the first PMISTFT having both a gate terminal thereof and a first terminal thereof coupled to an input terminal for receiving an input pulse via a first capacitance; a pair of a second NMISTFT and a second PMISTFT, each of the second NMISTFT and the second PMISTFT having a second terminal thereof coupled to the input terminal via a second capacitance; a third PMISTFT having a gate terminal thereof coupled to the gate terminals and the first terminals of the first NMISTFT and the first PMISTFT; a third NMISTFT having a gate terminal thereof coupled to the second terminals of the second NMISTFT and the second PMISTFT, a first terminal of the third PMISTFT, a second terminal of the first NMISTFT, and a second terminal of the first PMISTFT being coupled to a high-voltage power supply line, a second terminal of the third NMISTFT, a gate terminal and a first terminal of the second NMISTFT, a gate terminal and a first terminal of the second PMISTFT being coupled to a low-voltage power supply line, and a first junction point between a second terminal of the third PMISTFT and a first terminal of the third NMISTFT being connected to an output terminal of the level converter circuit.
In accordance with another embodiment of the present invention, there is provided a display device including a pair of substrates, an electrooptical material layer sandwiched between the pair of substrates, a plurality of pixels formed between the pair of substrates and a driver circuit for driving the plurality of pixels provided on one of the pair of substrates, the driver circuit including a level converter circuit comprised of MISTFTs (Metal Insulator Semiconductor Thin Film Transistors) having semiconductor layers made of polysilicon, the level converter circuit having a plurality of stages arranged in series, each of the plurality of stages comprising: a pair of a first NMISTFT (N-channel type Metal Insulator Semiconductor Thin Film Transistor) and a first PMISTFT (P-channel type Metal Insulator Semiconductor Thin Film Transistor), each of the first NMISTFT and the first PMISTFT having both a gate terminal thereof and a first terminal thereof coupled to an input terminal for receiving an input pulse via a first capacitance; a pair of a second NMISTFT and a second PMISTFT, each of the second NMISTFT and the second PMISTFT having a second terminal thereof coupled to the input terminal via a second capacitance; a third PMISTFT having a gate terminal thereof coupled to the gate terminals and the first terminals of the first NMISTFT and the first PMISTFT; a third NMISTFT having a gate terminal thereof coupled to the second terminals of the second NMISTFT and the second PMISTFT, a first terminal of the third PMISTFT, a second terminal of the first NMISTFT, and a second terminal of the first PMISTFT being coupled to a high-voltage power supply line, a second terminal of the third NMISTFT, a gate terminal and a first terminal of the second NMISTFT, a gate terminal and a first terminal of the second PMISTFT being coupled to a low-voltage power supply line, and a first junction point between a second terminal of the third PMISTFT and a first terminal of the third NMISTFT being connected to an output terminal.
In accordance with another embodiment of the present invention, there is provided a display device including a pair of substrates, an electrooptical material layer sandwiched between the pair of substrates, a plurality of pixels formed between the pair of substrates and a driver circuit for driving the plurality of pixels provided on one of the pair of substrates, the driver circuit including a level converter circuit comprised of MISTFTs (Metal Insulator Semiconductor Thin Film Transistors) of a same conductivity type and having semiconductor layers made of polysilicon, the level converter circuit comprising a first MISTFT, a second MISTFT, and a third MISTFT, first terminals of the first MISTFT and the second MISTFT being coupled to an input terminal for receiving an input pulse, gate terminals of the first MISTFT and the second MISTFT being coupled to a fixed-voltage power supply line, a second terminal of the first MISTFT being coupled to a gate terminal of the third MISTFT and a first terminal of a capacitor, a second terminal of the third MISTFT being coupled to a high-voltage power supply line, a first terminal of the third MISTFT being coupled to a second terminal of the second MISTFT, and a junction point of the second terminal of the second MISTFT, the first terminal of the third MISTFT, and a second terminal of the capacitor being connected to an output terminal of the level converter circuit.
In accordance with another embodiment of the present invention, there is provided a display device including a pair of substrates, an electrooptical material layer sandwiched between the pair of substrates, a plurality of pixels formed between the pair of substrates and a driver circuit for driving the plurality of pixels provided on one of the pair of substrates, the driver circuit including a level converter circuit comprised of MISTFTs (Metal Insulator Semiconductor Thin Film Transistors) of a same conductivity type and having semiconductor layers made of polysilicon, the level converter circuit comprising a first MISTFT, a second MISTFT, and a third MISTFT, first terminals of the first MISTFT and the second MISTFT being coupled to an input terminal for receiving an input pulse, a gate terminal of the first MISTFT being coupled to a fixed-voltage power supply line, a gate terminal of the second MISTFT being supplied with a pulse equal in magnitude and opposite in phase with respect to the input pulse, a second terminal of the first MISTFT being coupled to a gate terminal of the third MISTFT and a first terminal of a capacitor, a first terminal of the third MISTFT being coupled to a high-voltage power supply line, and a junction point of a second terminal of the second MISTFT, a second terminal of the third MISTFT, and a second terminal of the capacitor being connected to an output terminal of the level converter circuit.
In accordance with another embodiment of the present invention, there is provided a display device including a pair of substrates, an electrooptical material layer sandwiched between the pair of substrates, a plurality of pixels formed between the pair of substrates and a driver circuit for driving the plurality of pixels provided on one of the pair of substrates, the driver circuit including a level converter circuit comprised of MISTFTs (Metal Insulator Semiconductor Thin Film Transistors) of a same conductivity type and having semiconductor layers made of polysilicon, the level converter circuit having a plurality of stages arranged in series, each of the plurality of stages comprising: a first MISTFT, a second MISTFT, and a third MISTFT, first terminals of the first MISTFT and the second MISTFT being coupled to an input terminal for receiving an input pulse, a gate terminal of the first MISTFT being coupled to a fixed-voltage power supply line, a gate terminal of the second MISTFT being supplied with a pulse equal in magnitude and opposite in phase with respect to the input pulse, a second terminal of the first MISTFT being coupled to a gate terminal of the third MISTFT and a first terminal of a capacitor, a first terminal of the third MISTFT being coupled to a high-voltage power supply line, and a junction point of a second terminal of the second MISTFT, a second terminal of the third MISTFT, and a second terminal of the capacitor being connected to an output terminal.